RE_POL=Val_0x0, XFER_MODE=Val_0x0, DE_POL=Val_0x0
Transceiver Control Register
| RS485_EN | RS485 Transfer Enable All other fields in this register are reserved and registers UART_DE_EN, UART_RE_EN, and UART_TAT are also reserved. 1 (Val_0x1): The transfers will happen in RS485 mode. |
| RE_POL | Receiver Enable Polarity 0 (Val_0x0): RE signal is active low 1 (Val_0x1): RE signal is active high |
| DE_POL | Driver Enable Polarity 0 (Val_0x0): DE signal is active low 1 (Val_0x1): DE signal is active high |
| XFER_MODE | Transfer Mode Hardware will consider the Turnaround timings which are programmed in the UART_TAT register while switching from RE to DE or DE to RE. For transmission hardware will wait if it is in middle of receiving any transfer, before it starts transmitting. If the SW programs the Tx FIFO with the data then UART (after ensuring no receive is in progress), disables RE and enables DE signal. Once the Tx FIFO becomes empty, RE signal gets enabled and DE signal will be disabled. Hardware will consider the Turnaround timings which are programmed in the UART_TAT register while switching from RE to DE or DE to RE. The DE and RE signals are strictly complementary to each other. 0 (Val_0x0): In this mode, transmit and receive can happen simultaneously. UART_DE_EN[DE_ENABLE], UART_RE_EN[RE_ENABLE] can be enabled at any point of time. Turnaround timing as programmed in the UART_TAT register is not applicable in this mode. 1 (Val_0x1): In this mode, DE and RE are mutually exclusive. Either DE or RE is expected to be enabled. 2 (Val_0x2): In this mode, DE and RE are mutually exclusive. Once UART_DE_EN/UART_RE_EN register is set-by default RE will be enabled and UART controller will be ready to receive. |